Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 12/04/2023
Document Table of Contents

2.5. System-Level Debug Fabric

During compilation, the Intel® Quartus® Prime generates the JTAG Hub to allow multiple instances of debugging tools in a design.

Most Intel FPGA on-chip debugging tools use the JTAG port to control and read-back data from debugging logic and signals under test. The JTAG Hub manages the sharing of JTAG resources.

Note: For System Console, you explicitly insert debug IP cores into the design to enable debugging.

The JTAG Hub appears in the project's design hierarchy as a partition named auto_fab_<number> .