Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 12/04/2023
Public
Document Table of Contents
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3.4.5.4. Signals Unavailable for Signal Tap Debugging

Some post-fit signals in your design are unavailable for Signal Tap debugging. The Node Finder's Signal Tap: post-fitting filter does not return nodes that are unavailable for Signal Tap debugging.

The following signal types are unavailable for Signal Tap debugging:

  • Post-fit output pins—You cannot monitor a post-fit output or bidirectional pin directly. To make an output signal visible, monitor the register or buffer that drives the output pin.
  • Carry chain signals—You cannot monitor the carry out (cout0 or cout1) signal of a logic element. Due to architectural restrictions, the carry out signal can only feed the carry in of another LE.
  • JTAG signals—You cannot monitor the JTAG control (TCK, TDI, TDO, or TMS) signals.
  • LVDS—You cannot monitor the data output from a serializer/deserializer (SERDES) block.
  • DQ, DQS signals—You cannot directly monitor the DQ or DQS signals in a DDR or DDRII design.