EPCQ-A Serial Configuration Device Datasheet

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ID 683818
Date 10/01/2019
Public
Document Table of Contents

1.11.1. Write Operation Timing

Figure 20. Write Operation Timing Diagram


Table 24.  Write Operation Parameters
Symbol Parameter Min Typical Max Unit
fWCLK Write clock frequency (from the FPGA, download cable, or embedded processor) for write enable, write disable, read status, read device identification, write bytes, erase bulk, and erase sector operations. 100 MHz
tCH DCLK high time for EPCQ4A. 4 ns
DCLK high time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3.4
tCL DCLK low time for EPCQ4A. 4 ns
DCLK low time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3.4
tNCSSU Chip select (nCS) active setup time for EPCQ4A. 5 ns
Chip select (nCS) active setup time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 ns
tNCSH Chip select (nCS) not active hold time for EPCQ4A. 5 ns
Chip select (nCS) not active hold time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 ns
tNCSSU2 Chip select (nCS) not active setup time for EPCQ4A. 5 ns
Chip select (nCS) not active setup time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 ns
tNCSH2 Chip select (nCS) active hold time for EPCQ4A. 5 ns
Chip select (nCS) active hold time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 ns
tDSU DATA[] in setup time before the rising edge on DCLK 2 ns
tDH DATA[] hold time after the rising edge on DCLK for EPCQ4A. 5 ns
DATA[] hold time after the rising edge on DCLK for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3
tCSH Chip select (nCS) high time for EPCQ4A. 100 ns
Chip select (nCS) high time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 10 or 5011
tWB 12 13 Write bytes cycle time for EPCQ4A. 0.4 0.8 ms
Write bytes cycle time for EPCQ16A. 0.4 3
Write bytes cycle time for EPCQ32A and EPCQ128A. 0.7 3
Write bytes cycle time for EPCQ64A. 0.8 3
tWS 12 Write status cycle time 10 15 ms
tEB 12 Erase bulk cycle time for EPCQ4A 1 4 s
Erase bulk cycle time for EPCQ16A 5 25
Erase bulk cycle time for EPCQ32A 10 50
Erase bulk cycle time for EPCQ64A 20 100
Erase bulk cycle time for EPCQ128A 40 200
tES 12 Erase sector cycle time for EPCQ4A. 150 1000 ms
Erase sector cycle time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 2000
tESS 12 Erase subsector cycle time for EPCQ4A. 30 300 ms
Erase subsector cycle time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 45 400
11 10 ns for read and 50 ns for write, erase or program.
12 The Write Operation Timing Diagram does not show these parameters.
13 The tWB parameter is for a complete page write operation.

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