Follow these steps to compile and test the design in the supported Altera development kit:
- Launch the Quartus Prime software and compile the design (Processing > Start Compilation).
The timing contraints for the design example and the design components are automatically loaded during compilation.
- Connect the development board to the host computer.
- Configure the FPGA on the development board using the generated .sof file (Tools > Programmer).
- Launch the Clock Control tool, which is part of the development kit, and set new frequencies for the design example.
Note: The chapter that describes the design example states the frequencies to set.
- Reset the system by pressing the PB0 push button.
- In the Quartus Prime software, launch the system console (Tools > System Debugging Tools > System Console).
- Change the working directory to <Example Design>\hwtesting\system_console.
- Initialize the design command list by running this command, source main.tcl.
- You can now run any of the predefined hardware tests from the System Console. Observe the test results displayed.
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