- Updated the list of Intel® MAX® 10 device packages that support the 1.0 V LVCMOS I/O standard.
- Added 1.8 V LVDS I/O standard support.
- Updated the spreadsheet files (max10-1v-mutual-coupling.zip) that list the mutual inductance values for 1.0 V I/O.
||Updated the spreadsheet files (max10-1v-mutual-coupling.zip) that list the mutual inductance values for 1.0 V I/O.
- Added V81 and Y180 packages in the Package Plan for Intel® MAX® 10 Single Power Supply Devices table.
- Added Y180 package in the Migration Capability Across Intel® MAX® 10 Devices diagram.
- Updated footnote for 1.0 V LVCMOS to include new devices in the Supported I/O Standards in Intel® MAX® 10 Devices table.
- Updated figure title to I/O Banks for 10M02 (Single Power Supply U324 Package), 10M04, and 10M08 (Except V81, M153, and U169 Packages) Devices.
- Added diagram: I/O Banks for 10M08 V81, M153, and U169 Packages Devices.
- Updated max10-1v-mutual-coupling.zip file and the link description to include new devices.
- Added F256 device package and updated U324 device package in the DDR3 and LPDDR2 Memory Interface Widths and Device Packages Where Two GPIOs Adjacent to DQ Pins Are Disabled table.
||Updated the guidelines in the table listing the geometry-based I/O restrictions related to ADC usage.
||Updated the guidelines for JTAG pins in table Dual-Purpose Configuration Pin Guidelines for Intel MAX 10 Devices.
||Updated the clamp diode for LVTTL/LVCMOS input buffers guidelines to remove references to "undershoot". The clamp diode manages overshoot voltages only.
||Updated the table in the I/O restriction rules guideline topic to improve clarity.
- Added support for 1.0 V LVCMOS I/O standard.
- Added placement restriction guideline for 1.0 V I/O pins.
||Removed support for 1.0 V LVCMOS I/O standard.
- Updated introductory statements about GPIO usage to improve clarity.
- Added support for 1.0 V LVCMOS I/O standard for commercial grade devices only.
- Added link to the list of Intel® MAX® 10 develoment kits and boards.
- Added statement to clarify that when the Intel® MAX® 10 device is blank or erased, the I/Os are tri-stated.
- Updated the guideline for VCCIO range to improve clarity.
- Updated the topic about the PCI clamp diode and added links to related information.
- Updated the topic about programmable emulated differential output to improve clarity.