AN 692: Power Sequencing Considerations for Intel® Cyclone® 10 GX, Intel® Arria® 10, Intel® Stratix® 10, and Intel® Agilex™ Devices

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ID 683725
Date 10/11/2019
Public

1.3.2. Transceiver Pin Guidance for Unpowered FPGA

Intel® Cyclone® 10 GX, Intel® Arria® 10, and Intel® Stratix® 10 L-tile and H-tile device transceiver pins do not support ‘Hot-Socketing.’

Fully configure the transceiver block before driving or having any activity on the Intel® Cyclone® 10 GX and Intel® Arria® 10 device transceiver pins.

Intel® Stratix® 10 L-tile and H-tile device transceiver pins do not support ‘Hot-Socketing’ although these transceiver pins can tolerate 1.0 Vp-p during power-up or power-down.

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