AN 692: Power Sequencing Considerations for Intel® Cyclone® 10 GX, Intel® Arria® 10, Intel® Stratix® 10, and Intel® Agilex™ Devices

ID 683725
Date 10/11/2019
Public Low-Cost Sequencer Circuit Description

The example design for the simple low-cost power-up/down sequencer uses a quad comparator IC (U1) and discrete resistors and capacitors.
Figure 4. Low-Cost Sequencer Example Circuit

A system standby voltage VCC_stby is always present to power the comparator U1A. A reference voltage Vref is generated from VCC_stby through resistor dividers R3 and R4. Vref is the reference voltage for the inverting input of comparator U1A. A more accurate Vref can be generated using a precision trimmed zener diode in place of resistor R4. The resistor ladder network consists of resistors R7, R8, R9, and R10. This ladder network further divides the reference voltages V3, V2, and V1. Comparator (U1B, U1C, and U1D) outputs drive the associated regulator enables (En_reg3, En_Reg2, En_Reg1). These outputs turn On/Off the voltage regulators (not shown). Switch S1 is the system power On/Off switch.

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