PHY Lite for Parallel Interfaces FPGA IP User Guide

ID 683716
Date 1/13/2025
Public
Document Table of Contents

4.3. Getting Started

You can instantiate the PHY Lite for Parallel Interfaces FPGA IP for Agilex™ 7 F-Series and I-Series devices from IP Catalog in Quartus® Prime software. Altera provides an integrated parameter editor that allows you to customize this IP to support a wide variety of applications.

This IP is located in Libraries > Basic Functions > I/O of the IP catalog.