PHY Lite for Parallel Interfaces FPGA IP User Guide

ID 683716
Date 1/13/2025
Public

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Document Table of Contents

2.1. Release Information

The FPGA IP versioning scheme is X.Y.Z and this version number can change with each Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.

The following table provides the release information of PHY Lite for Parallel Interfaces FPGA IP for Agilex™ 5 D-Series and E-Series.

Table 2.   PHY Lite for Parallel Interfaces FPGA IP for Agilex™ 5 D-Series and E-Series Release Information
Item Description
IP Version 8.0.0
Quartus® Prime Pro Version 24.3.1
Release Date 2025.01.13