MAX® 10 FPGA Device Overview

ID 683658
Date 6/14/2022

Document Revision History for Intel® MAX® 10 FPGA Device Overview

Document Version Changes
2022.06.14 Updated the LVDS receiver and transmitter speeds from 830 Mbps and 800 Mbps, respectively, to 720 Mbps.
  • Updated the Sample Ordering Code and Available Options for Intel® MAX® 10 Devices diagram.
    • Added SL and DD feature options, Y package type, and 180 package code.
    • Removed –I6 speed grade from contact information. All OPNs for –I6 speed grade are available in the Intel® Quartus® Prime Standard Edition software version 21.1 onwards.
  • Added V81 and Y180 packages in the Package Plan for Intel® MAX® 10 Single Power Supply Devices table.
  • Added Y180 package in the Migration Capability Across Intel® MAX® 10 Devices diagram.
Date Version Changes
December 2017 2017.12.15
  • Added the U324 package for the Intel® MAX® 10 single power supply devices.
  • Updated the 10M02 GPIO and LVDS count in the Maximum Resource Counts for Intel® MAX® 10 Devices table.
  • Updated the I/O vertical migration figure.
February 2017 2017.02.21
  • Rebranded as Intel.
December 2016 2016.12.20
  • Updated EMIF information in the Summary of Features for Intel® MAX® 10 Devices table. EMIF is only supported in selected Intel® MAX® 10 device density and package combinations, and for 600 Mbps performance, –6 device speed grade is required.
  • Updated the device ordering information to include P for leaded package.
May 2016 2016.05.02
  • Removed all preliminary marks.
  • Update the ADC sampling rate description. The ADC feature monitors single-ended external inputs with a cumulative sampling rate of 25 kilosamples per second to 1 MSPS in normal mode.
November 2015 2015.11.02
  • Removed SF feature from the device ordering information figure.
  • Changed instances of Quartus II to Intel® Quartus® Prime .
May 2015 2015.05.04
  • Added clearer descriptions for the feature options listed in the device ordering information figure.
  • Updated the maximum dedicated LVDS transmitter count of 10M02 device from 10 to 9.
  • Removed the F672 package of the Intel® MAX® 10 10M25 device :
    • Updated the devices I/O resources per package.
    • Updated the I/O vertical migration support.
    • Updated the ADC vertical migration support.
  • Updated the maximum resources for 10M25 device:
    • Maximum GPIO from 380 to 360.
    • Maximum dedicated LVDS transmitter from 26 to 24.
    • Maximum emulated LVDS transmitter from 181 to 171.
    • Maximum dedicated LVDS receiver from 181 to 171.
  • Added ADC information for the E144 package of the 10M04 device.
  • Updated the ADC vertical migration diagram to clarify that there are single ADC devices with eight and 16 dual function pins.
  • Removed the note about contacting Altera for DDR3, DDR3L, DDR2, and LPDDR2 external memory interface support. The Intel® Quartus® Prime software supports these external memory interfaces from version 15.0.
December 2014 2014.12.15
  • Changed terms:
    • "dual image" to "dual configuration image"
    • "dual-image configuration" to dual configuration"
  • Added memory initialization feature for Flash and Analog devices.
  • Added maximum data retention capacity of up to 20 years for UFM feature.
  • Added maximum operating frequency of 7.25 MHz for serial interface for UFM feature.
September 2014 2014.09.22 Initial release.