Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 12/04/2023
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5.5.9.8. Change Adder Tree Styles

Structuring adder trees appropriately to match your targeted Intel FPGA device architecture and application can provide significant improvements in your design's efficiency and performance.

A good example of an application using a large adder tree is a finite impulse response (FIR) correlator. Using a pipelined binary or ternary adder tree appropriately can greatly improve the quality of your results for such applications.

Because ALMs can implement functions of up to six inputs, you can improve the performance of certain designs by using a compressor implementation for adder trees, rather than the default balanced binary tree implementation. The expected downside tradeoff of the compressor implementation is the use of more ALM logic resources. However, the overall logic depth is lower, and the final timing characteristics improve.

Figure 65. Balanced Binary Versus Compressor Style Adder Trees

For designs that may benefit, you can apply the Use Compressor Implementation (USE_COMPRESSOR_IMPLEMENTATION) global, entity, or instance assignment to specify whether the Compiler synthesizes adder trees as balanced binary trees, or as compressor style trees.

You can specify this assignment in the Assignment Editor, or with the following assignment in the .qsf.

set_instance_assignment -name USE_COMPRESSOR_IMPLEMENTATION ALWAYS -to <foo>

You can specify this assignment as either a global assignment, entity assignment, or instance assignment. You can alternatively use this assignment with altera_attribute to create instance assignments as well. For example:

(* altera_attribute = "-name USE_COMPRESSOR_IMPLEMENTATION ALWAYS" *) module foo(a, b, c, o);

The following options are available for this assignment:

Table 33.  Use Compressor Implementation Assignment Options
Option Description
Always The Compiler always synthesizes all adder trees with this assignment as compressor style trees. There is a limit of at least 2 non-constant operands before this triggers (otherwise synthesis implements a binary add or a pure-LUT implementation depending on size).
Never The Compiler never synthesizes the assigned adder tree as a compressor. The Compiler synthesizes the adder as either a balanced binary tree, or if sufficiently small, in pure LUTs.
Auto This setting currently behaves the same as the Never setting. The Compiler synthesizes the adder as either a balanced binary tree, or if sufficiently small, in pure LUTs. This setting never uses compressor style adder trees.