Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 12/04/2023
Public
Document Table of Contents
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1.3.1. Area Reduction Trade-Offs

By default, the Intel® Quartus® Prime Fitter might physically spread a design over the entire device to meet the set timing constraints. If you prefer to optimize your design to use the smallest area, you can change this behavior by selecting Aggressive Area for the Compiler Optimization Mode. If you require reduced area, you can enable certain physical synthesis options to modify your netlist to create a more area-efficient implementation, but at the cost of increased runtime and decreased performance.
Figure 5. Optimize for Area