AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines

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ID 683607
Date 8/24/2021
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. Intel® Quartus® Prime Software Guidelines 4. Device Guidelines 5. Document Revision History for AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines
2. Overview x
2.1. Available Device Options and Ordering Part Numbers
3. Intel® Quartus® Prime Software Guidelines x
3.1. Design Migration 3.2. Intel® Quartus® Prime Software Patch Compatibility 3.3. Related Intel® Quartus® Prime Software Error Messages
4. Device Guidelines x
4.1. Device Configuration Guidelines 4.2. GPIO and LVDS Guidelines 4.3. Transceiver Guidelines 4.4. Error Message for Design Exceeding Maximum Transceiver Bandwidth
4.2. GPIO and LVDS Guidelines x
4.2.1. I/O Resource Comparison Between Standard OPN and IOL OPN Devices 4.2.2. Design Migration 4.2.3. Error Message for > 700 Pins Utilization
4.3. Transceiver Guidelines x
4.3.1. Transceiver Bandwidth Calculation
1. Introduction
2. Overview
3. Intel® Quartus® Prime Software Guidelines
4. Device Guidelines
5. Document Revision History for AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines

4.1. Device Configuration Guidelines

Intel® Stratix® 10 I/O Limited (IOL) FPGAs have unique device IDs that control device firmware to prevent loading of unauthorized programming files.

Programming File Compatibility

The following table shows programming file compatibility between standard OPN devices and equivalent IOL OPN devices. If you target the same design to both a standard OPN device and a compatible IOL OPN device, you can choose to compile the design using IOL OPN only.

Table 4.  Programming File Compatibility Between Intel® Stratix® 10 FPGA with Standard OPN and Intel® Stratix® 10 I/O Limited FPGA with IOL OPN
  Intel® Stratix® 10 Standard Device Intel® Stratix® 10 I/O Limited Device
Programming file generated with I/O Limited OPN Yes Yes
Programming file generated with standard OPN Yes No

Method to Identify a Device OPN from the .SOF Programming File

The following steps allow you to determine whether a given .SOF file targets an Intel® Stratix® 10 FPGA with Standard OPN or an Intel® Stratix® 10 FPGA with IOL OPN.

  1. Go to the Intel® Quartus® Prime software command-line interface.
  2. Change the working directory to locate the .SOF file: $cd<sof_file_directory>
  3. Type and run the quartus_pfg command: $ quartus_pfg -i <filename>.sof
  4. In the displayed message, search for Device: <device_OPN>.

The following figure illustrates an example of the displayed Intel® Quartus® Prime software message. The part number of the targeted Intel® Stratix® 10 I/O Limited FPGA ends with NL.

Figure 6. Example of Intel® Quartus® Prime Software Message showing IOL OPN in .SOF File

For information on Device ID, refer to Device ID in the Intel® Stratix® 10 JTAG Boundary-Scan Testing User Guide.

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