AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines

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ID 683607
Date 8/24/2021
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. Intel® Quartus® Prime Software Guidelines 4. Device Guidelines 5. Document Revision History for AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines
2. Overview x
2.1. Available Device Options and Ordering Part Numbers
3. Intel® Quartus® Prime Software Guidelines x
3.1. Design Migration 3.2. Intel® Quartus® Prime Software Patch Compatibility 3.3. Related Intel® Quartus® Prime Software Error Messages
4. Device Guidelines x
4.1. Device Configuration Guidelines 4.2. GPIO and LVDS Guidelines 4.3. Transceiver Guidelines 4.4. Error Message for Design Exceeding Maximum Transceiver Bandwidth
4.2. GPIO and LVDS Guidelines x
4.2.1. I/O Resource Comparison Between Standard OPN and IOL OPN Devices 4.2.2. Design Migration Total Device Power Consumption Pin Connection for Unused Pins 4.2.3. Error Message for > 700 Pins Utilization
4.3. Transceiver Guidelines x
4.3.1. Transceiver Bandwidth Calculation
1. Introduction
2. Overview
3. Intel® Quartus® Prime Software Guidelines
4. Device Guidelines
5. Document Revision History for AN 951: Intel® Stratix® 10 I/O Limited FPGA Design Guidelines

4.2.2. Design Migration

When migrating a design from a larger I/O utilization count to a lesser I/O utilization count, you should evaluate the total device power and pin connections change.

Total Device Power Consumption

The device power consumption depends on the I/O utilization in the design. When I/O utilization changes after migrating a design from standard OPN to I/O Limited (IOL) OPN devices, you should evaluate power consumption using the Intel® Quartus® Prime Power Analyzer or Intel® FPGA Power and Thermal Calculator, to achieve accurate power estimation.

For related information, refer to:

Pin Connection for Unused Pins

If there are unused I/O pins after migrating a design from standard OPN to IOL OPN devices, you must connect the unused pins as defined in the Intel® Quartus® Prime software. The following steps illustrate this process:

  1. In the Project Navigator in the Intel® Quartus® Prime software, right-click the OPN, and then click Device.
    Figure 7. Opening the Device Dialog Box
  2. In the Device dialog box, click the Device and Pin Options button.
    Figure 8. Device and Pin Options Button in the Device Dialog Box
  3. Navigate to the Unused Pins tab in the Category tree at the left side of the Device and Pin Options dialog box. Select your preferred setting from the drop-down list in the Reserve all unused pins section.
    Figure 9. Device and Pin Options Dialog Box
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