E-tile Hard IP Intel® Stratix® 10 Design Examples User Guide: Ethernet, CPRI PHY, and Dynamic Reconfiguration

ID 683578
Date 3/06/2022
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Document Table of Contents

1. About E-tile Hard IP Design Examples

Updated for:
Intel® Quartus® Prime Design Suite 21.3
This document consists of the following design examples:
  • E-Tile Hard IP for Ethernet Intel FPGA IP design example
  • E-tile CPRI PHY Intel® FPGA IP design example
  • E-Tile Dynamic Reconfiguration Design Example

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