E-tile Hard IP Intel® Stratix® 10 Design Examples User Guide: Ethernet, CPRI PHY, and Dynamic Reconfiguration

ID 683578
Date 3/06/2022

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Document Table of Contents

4.3.5. CPRI Design Example Registers

Table 38.   E-tile CPRI PHY Intel® FPGA IP Hardware Design Example Register Map

Word Offset

Register Category

0x000000 – 0x000FFF CPRI PCS registers
0x010000 – 0x0107FF RS-FEC configuration registers
0x100000 – 0x1FFFFF Transceiver registers