AN 819: Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices

ID 683560
Date 9/24/2018
Document Table of Contents

1.3.1. BSP Top

This Platform Designer system contains all the subsystems of this reference design. The system comprises of three main components - the top-level design, the PCIe* IP core, and the DDR4 External Memory Interfaces IP core. The system connects to external pins through the wrapper.