Nios® II Software Developer Handbook

ID 683525
Date 8/28/2023
Public
Document Table of Contents

10.1. Nios® II Cache Implementation

Depending on the Nios® II core implementation, a Nios® II processor system might or might not have data or instruction caches. You can write programs generically so that they function correctly on any Nios® II processor, regardless of whether it has cache memory. For a Nios® II core without one or both caches, cache management operations are benign and have no effect.

The current Nios® II cores have no hardware cache coherency mechanism. Therefore, if multiple masters can access shared memory, software must explicitly maintain coherency across all masters.

For more information about the features of each Nios® II core implementation, refer to the " Nios® II Core Implementation Details" chapter of the Nios® II Processor Reference Handbook.