Data Plane Development Kit Reference Manual: Intel FPGA Programmable Acceleration Card N3000

ID 683512
Date 12/06/2019
Public
Document Table of Contents

2.4.2.2. opae_manager_flash()

Prototype:

int opae_manager_flash(struct opae_manager *mgr, int id, void *buf, u32 size, u64 *status);

Arguments:

name: A pointer to the opae_manager

id: An ID.
buf: A pointer to a buffer.
size: The size of the buffer which is the size of the configuration bitstream.
status: The hardware status, including the PR error code when the return value is -EIO.

Returns:

Int.

Description:

Store a configuration bitstream for FPGA reconfiguration in flash memory using the opae_manager. The Intel® FPGA PAC N3000 does not support partial reconfiguration (PR).
Related Defines None.

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