Data Plane Development Kit Reference Manual: Intel FPGA Programmable Acceleration Card N3000

ID 683512
Date 12/06/2019
Document Table of Contents

1.2. Acronym List

Acronym Expansion Description
Intel® FPGA PAC Intel FPGA Programmable Acceleration Card Intel FPGA PAC N3000 is a full-duplex 100 Gbps in-system re-programmable acceleration card for multiworkload networking application acceleration.
AFU Accelerator Functional Unit Hardware Accelerator implemented in FPGA logic which offloads a computational operation for an application from the CPU to improve performance.
AF Acceleration Function Compiled Hardware Accelerator image implemented in FPGA logic that accelerates an application.
API Application Programming Interface A set of subroutine definitions, protocols, and tools for building software applications.
DPDK Data Plane Development Kit The Data Plane Development Kit consists of libraries to accelerate packet processing workloads running on many CPU architectures, including x86, POWER and ARM processors. DPDK runs mostly on Linux with a FreeBSD port available for a subset of DPDK features. The Open Source BSD License DPDK licenses DPDK.
FIU FPGA Interface Unit FIU is a platform interface layer that acts as a bridge between platform interfaces like PCIe* and AFU-side interfaces such as CCI-P.
OPAE Open Programmable Acceleration Engine The OPAE is a set of drivers, utilities, and API's for managing and accessing AFs.

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