Low Latency 100G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683505
Date 1/27/2021
Public

3.1. Features

The Ethernet Toolkit offers the following features when used with hardware design that has standalone Ethernet IP as well as with an Intel® Quartus® Prime generated Ethernet IP design example:
  • Verifies the status of the Ethernet link.
  • Reads and writes to status and configuration registers of the IP.
  • Displays the values of TX/RX status and statistics registers.
  • Ability to assert and deassert IP resets.
  • Verifies the IPs error correction capability.

The Ethernet Toolkit also offers some additional features when used with an Intel® Quartus® Prime generated Ethernet IP design example:
  • Provides access to the example design packet generator.
  • Execute testing procedures to verify the functionality of Ethernet IPs.
  • Enable and disable MAC loopback.
  • Set source and destination MAC addresses.

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