AN 860: Using Intel® Arria® 10 SoC FPGA Early I/O Release

ID 683437
Date 12/15/2022
Public

4. Debugging Early I/O Release

If a design uses the Intel® Arria® 10 SoC FPGA Early I/O Release feature, Intel recommends you enable the feature in the Intel® Quartus® Prime project and Platform Designer design file when the design process begins. The feature enables the Intel® Quartus® Prime compilation tools to check for pin usage restrictions.

When bringing up the design in hardware for the first time, temporarily disabling the Early I/O Release feature and following the normal combined .rbf configuration flow can help confirm that external memory is configured and calibrating properly. Intel recommends you avoid using .rbf file compression when initially testing a design.

After you confirm that configuration and external memory calibration is successful with Early I/O release disabled, Intel recommends you enable the Early I/O Release without .rbf file compression. Testing the Early I/O Release feature without .rbf file compression helps determine that your design is properly implementing the flow as described in this document.

If required by the design, you must use .rbf file compression with the Early I/O Release feature and validate using the previous bring up steps.

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