Generic Serial Flash Interface Intel® FPGA IP User Guide

ID 683419
Date 11/09/2021
Public
Download

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

1.8.1. Flash Operations that Require Operation Code

The following flash operations require an operation code:

  • Write enable
  • Enter 4-byte addressing mode
  • Exit 4-byte addressing mode
  • Clear flag status register
  • Clear status register

The following registers are used for operations that require an operation code:

  • Flash command setting register
  • Flash command control register

Perform the Write Enable Operation for the Flash

proc write_enable { } {
global mp flash_cmd_setting flash_cmd_ctrl flash_cmd_write_data_0
master_write_32 $mp $flash_cmd_setting 0x00000006
master_write_32 $mp $flash_cmd_ctrl 0x1
}

To perform the write enable operation for the flash, follow these steps:

  1. Define the global variables.
  2. Customize the write enable operation by writing to the flash command setting register.
    1. Set bit [7:0] of this register to 06 as 06h is the operation code of the write enable operation.
  3. Write 1 to bit 0 of the flash command control register to start the write enable operation.