Intel® Stratix® 10 Power Management User Guide

ID 683418
Date 10/31/2023
Public
Document Table of Contents

2.3.1. Power Supplies Monitored and Not Monitored by the POR Circuitry

Table 7.  Power Supplies Monitored and Not Monitored by the Intel® Stratix® 10 POR Circuitry
Power Supplies Monitored Power Supplies Not Monitored
  • VCC
  • VCCERAM
  • VCCPT
  • VCCADC
  • VCCIO_SDM
  • VCCBAT
  • VCCL_HPS 7
  • VCCFUSE_GXP 8
  • VCCP
  • VCCR_GXB
  • VCCT_GXB
  • VCCH_GXB
  • VCCIO
  • VCCIO_HPS 7
  • VCCA_PLL
  • VCCFUSEWR_SDM
  • VCCPLLDIG_SDM
  • VCCPLLDIG_HPS 7
  • VCCPLL_HPS 7
  • VCCPLL_SDM
  • VCCM_WORD
  • VCCIO_UIB
  • VCCRT_GXE
  • VCCRTPLL_GXE
  • VCCIO3V
  • VCCH_GXE
  • VCCCLK_GXE
  • VCCRT_GXP
  • VCCH_GXP
  • VCCCLK_GXP
  • VCCIO3D 9
  • VCCIO3C 9
Note: Intel® recommends you to connect VCCBAT to a 1.8V power supply if you do not use the design security feature in Intel® Stratix® 10 devices.
7 These are only supported by system-on-a-chip (SoC) FPGA.
8 This power rail will not gate SDM power up, but it will gate FPGA configuration.
9 Applies to the 1SG040 and 1SX040 devices only.