Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

ID 683349
Date 3/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.4.1.4.3. XML Elements for RESOURCES

In the RTL module properties file of the RTL module within an HLS library, there are optional elements under RESOURCES that you can define to specify the estimated FPGA resource utilization of the module. If you do not specify a particular element, it is assigned a default value of zero in the report estimates.
Table 32.  XML Elements for the RTL module properties file RESOURCES Element
XML Element Description
ALUTS Specifies the number of combinational adaptive look-up tables (ALUTs) that the module uses.
FFS Specifies the number of dedicated logic registers that the module uses.
RAMS Specifies the number of block RAMs that the module uses.
DSPS Specifies the number of digital signal processing (DSP) blocks that the module uses.
MLABS Specifies the number of memory logic arrays (MLABs) that the module uses. This value is equal to the number of adaptive logic modules (ALMs) that is used for memory divided by 10 because each MLAB consumes 10 ALMs.