Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

ID 683349
Date 3/28/2022
Public

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8.5. Declaring hls_float Data Types

The Intel® HLS Compiler Pro Edition includes the hls_float.h header file for arbitrary-precision floating-point number support. The floating-point representation for hls_float data types adopts the same IEEE 754 standard as native C++ float and double types.

The hls_float.h header file does not work with native compilers (g++ or MSVC).

An hls_float variable carries an explicit sign bit and an arbitrary number of bits for the exponent and mantissa.

Due to the differences in the internal math implementations and rounding errors, the results from hls_float operations might not always be bit-accurate to those produced by C++ native floating-point types with the same exponent and mantissa bit widths.
  1. Include the hls_float.h header file in your component in the following manner:
    #include "HLS/hls_float.h"
  2. After you include the header file, declare your hls_float variables as follows:
    hls_float<exponent_width, mantissa_width[,rounding_mode]>
    The hls_float.h header file also provides aliases in the ihc namespace so that you can declare ihc::bfloat16 and ihc::bfloat19 data types directly.
    Where the template attributes are defined as follows:
    exponent_width, mantissa_width
    The bit-width of the exponent and mantissa of the floating-point variable.
    The hls_float data type supports the following exponent_width, mantissa_width combinations:
    Table 20.  Exponent- and Mantissa-Width Combinations Supported by the hls_float Data Type
    5, 10 8, 7 8 , 10 8 , 17 8 , 23
    8, 26 10, 35 11, 44 11, 52 15, 63
    Some of these width combinations map to some commonly used floating-point formats:
    Floating-Point Format exponent_width, mantissa_width Setting
    IEEE 754 half-precision (binary16) 5, 10
    bfloat162 8, 7
    bfloat193 8,10
    IEEE 754 single-precision (binary32) 8. 23
    IEEE 754 double-precision (binary64) 11, 52
    80-bit extended precision4 15, 63
    rounding_mode
    Optional parameter to specify the IEEE 754 rounding mode used when converting between data types.
    Set the rounding mode with one of the following values:
    • ihc::fp_config::FP_Round::RNE

      Round to nearest, tie to even

      This rounding mode is more accurate (0.5 ULP), but requires more FPGA area.

    • ihc::fp_config::FP_Round::RZERO

      Round towards zero

      This rounding mode is less accurate (1 ULP) and requires less FPGA area.

    If you do not set this parameter, the Intel® HLS Compiler uses the ihc::FP_Round::RNE rounding mode.

The hls_float data type supports a limited set of math operations. For details, see Operators and Return Types Supported by the hls_float Data Type.

2 You can also declare this format directly as a bfloat16 data type.
3 You can also declare this format directly as a bfloat19 data type.
4 Not a bit-to-bit mapping.

80-bit extended precision has one explicit bit of fraction that is dropped when converting it to hls_float<15,63>.

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