1. AN 768: Multi-Rate (Up to 12G) SDI II Reference Design for Intel Arria 10 Devices
- Channel 0 TX
- Transceiver Native PHY in TX Simplex mode
- SDI II transmitter instance
- TX channel Transceiver PHY reset controller
- TX PLL
- Channel 0 RX
- Transceiver Native PHY in RX Simplex mode
- SDI II IP receiver instance
- RX channel Transceiver PHY reset controller
- Transceiver reconfiguration management block
For more information about each component in the block diagram, refer to Reference Design Components.
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