Visible to Intel only — GUID: mco1572912314224
Ixiasoft
1. Intel® HLS Compiler Standard Edition Reference Manual
2. Compiler
3. C Language and Library Support
4. Component Interfaces
5. Component Memories (Memory Attributes)
6. Loops in Components
7. Component Concurrency
8. Arbitrary Precision Math Support
9. Component Target Frequency
10. Intel® High Level Synthesis Compiler Standard Edition Compiler Reference Summary
A. Supported Math Functions
B. Intel® HLS Compiler Standard Edition Reference Manual Archives
C. Document Revision History of the Intel® HLS Compiler Standard Edition Reference Manual
4.1. Component Invocation Interface
4.2. Avalon® Streaming Interfaces
4.3. Avalon® Memory-Mapped Master Interfaces
4.4. Slave Interfaces
4.5. Component Invocation Interface Arguments
4.6. Unstable and Stable Component Arguments
4.7. Global Variables
4.8. Structs in Component Interfaces
4.9. Reset Behavior
10.1. Intel® HLS Compiler Standard Edition i++ Command-Line Arguments
10.2. Intel® HLS Compiler Standard Edition Header Files
10.3. Intel® HLS Compiler Standard Edition Compiler-Defined Preprocessor Macros
10.4. Intel® HLS Compiler Standard Edition Keywords
10.5. Intel® HLS Compiler Standard Edition Simulation API (Testbench Only)
10.6. Intel® HLS Compiler Standard Edition Component Memory Attributes
10.7. Intel® HLS Compiler Standard Edition Loop Pragmas
10.8. Intel® HLS Compiler Standard Edition Component Attributes
10.9. Intel® HLS Compiler Standard Edition Component Default Interfaces
10.10. Intel® HLS Compiler Standard Edition Component Invocation Interface Arguments
10.11. Intel® HLS Compiler Standard Edition Component Macros
10.12. Intel® HLS Compiler Standard Edition Streaming Input Interfaces
10.13. Intel® HLS Compiler Standard Edition Streaming Output Interfaces
10.14. Intel® HLS Compiler Standard Edition Memory-Mapped Interfaces
10.15. Intel® HLS Compiler Standard Edition Arbitrary Precision Data Types
Visible to Intel only — GUID: mco1572912314224
Ixiasoft
4.1. Component Invocation Interface
For each function that you label as a component, the Intel® HLS Compiler creates a corresponding RTL module. This RTL module must have top-level ports, or interfaces, that allow your overall system to interact with your HLS component.
By default, the RTL module for a component includes the following interfaces and data:
- A call interface that consists of start and busy signals. The call interface is sometimes referred to as the do stream.
- A return interface that consists of done and stall signals. The return interface is sometimes referred to as the return stream.
- Return data if the component function has a return type that is not void
Your component function parameters generate different RTL depending on their type. For details see the following sections:
You can also explicitly declare Avalon Streaming interfaces (stream_in<> and stream_out<> classes) and Avalon Memory-Mapped Master (mm_master<> classes) interfaces on component interfaces. For details see the following sections:
In addition, you can indicate the control signals that correspond to the actions of calling your component by using the component invocation interface arguments. For details, see Component Invocation Interface Arguments.
Did you find the information on this page useful?
Feedback Message
Characters remaining: