AN 821: Interface Planning for Intel® Stratix® 10 FPGAs

ID 683307
Date 12/15/2017
Public

1.4. Modifying the FPGA_TOP Design Example

You can modify the FPGA_TOP design example to more closely match your application or requirements. For example, you can modify the VHDL generics to activate IP in the system, or you can change the target device to meet your resource or PCB requirements. The following sections describe making these modifications to the design example files or project settings.