Intel® High Level Synthesis Compiler Standard Edition: User Guide

ID 683306
Date 12/18/2019
Document Table of Contents

A.2. Reviewing the Report Summary

The report summary gives you a quick overview of the results of compiling your design including a summary of each component in your design and a summary of the estimated resources that each component in your design uses.

The report summary is divided into the following sections: Info, Quartus Fit Summaries, Estimated Resource Usage, and Compile Warnings.


The Info section shows general information about the compile including the following items:
  • Name of the project
  • Target FPGA family and device
  • Intel® Quartus® Prime version
  • HLS compiler version
  • The command that was used to compile the design
  • The date and time at which the reports were generated

Quartus Fit Summaries

After you compile your design with Intel® Quartus® Prime Standard Edition software, the sections that summarize the compilation results are populated. The following sections appear on the Summary page:
  • Quartus Fit Clock Summary
  • Quartus Fit Resource Utilization Summary

The Quartus Fit Clock Summary section shows the maximum clock frequency that can be achieved for the design.

The Quartus Fit Resource Utilization Summary section shows the total area utilization both for the entire design, and for each component individually. There is no breakdown of area information by source line.

Estimated Resource Usage

The Estimated Resource Usage section shows a summary of the estimated resources used by each component in your design, as well as the total resources used for all components.

Compile Warnings

The Compile Warnings section shows the compiler warnings generated during the compilation.