Visible to Intel only — GUID: gpj1573072439234
Ixiasoft
Visible to Intel only — GUID: gpj1573072439234
Ixiasoft
A.4.1. Area Analysis Example
Area Analysis of System
Area analysis of system shows an area breakdown that is closest to the actual hardware implemented in the FPGA.
![](/content/dam/docs/us/en/683306/19-1/evc1551675282908.png)
The System entry in the Area Analysis of System report refers to all the components in the design. Expanding the System entry allows you to view all the components in the design. In this example, there is only one component (that is, transpose_and_fold).
![](/content/dam/docs/us/en/683306/19-1/vxs1473361096033.png)
Area Analysis by Source
Area analysis by source shows an approximation of how each line of the source code affects area. In the area analysis by source view, the report shows the area hierarchically.
![](/content/dam/docs/us/en/683306/19-1/xme1473356283189.png)
The System entry in the area report refers to all the components in the design. Expanding the System entry allows you to view all the components in the design. In this example, there is only one component (that is, transpose_and_fold).
Each line in the report contains state and corresponding information. In the figure below, the example area report shows that on line 17, where a stream of data is stored to in_buf, the consumed area is used for computing the pointer value and then storing it. On line 14, area consumption is a result of in_buf using 16 RAM blocks and some logic.
![](/content/dam/docs/us/en/683306/19-1/nko1473359567458.jpg)