Intel® High Level Synthesis Compiler Standard Edition: User Guide

ID 683306
Date 12/18/2019
Document Table of Contents

8. Integrating your IP into a System

To integrate your HLS compiler-generated IP into a system with Intel® Quartus® Prime, you must be familiar with Intel® Quartus® Prime Standard Edition as well as the Platform Designer (formerly Qsys) system integration tool included with Intel® Quartus® Prime.

The <result>.prj/components directory contains all the files you need to include your IP in an Intel® Quartus® Prime project.
The IP that the HLS compiler generates for each component is self contained. You can move the folders in the components directory to a different location or machine if desired.
Important prerequsite for Intel® Max® 10 FPGA users:
If you develop your component IP for Intel® MAX® 10 devices and you want to integrate your component IP into a system that you are developing in Intel® Quartus® Prime, ensure that the Intel® Quartus® Prime settings file (.qsf) for your system contains one of the following lines:
When you compile a component for the Intel® MAX® 10 device family with the Intel® HLS Compiler, the generated Intel® Quartus® Prime example project contains all of the required QSF settings for your component. However, the Intel® Quartus® Prime project for the system into which you integrate your component might not have the required QSF setting.

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