Nios II Custom Instruction User Guide

ID 683242
Date 4/27/2020
Public
Document Table of Contents
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2.1. Custom Instruction Types

Different types of custom instructions are available to meet the requirements of your application. The type you choose determines the hardware interface for your custom instruction.
Table 1.  Custom Instruction Types, Applications, and Hardware Ports
Instruction Type Application Hardware Ports
Combinational Single clock cycle custom logic blocks.
  • dataa[31:0]
  • datab[31:0]
  • result[31:0]
Multicycle Multi-clock cycle custom logic blocks of fixed or variable durations.
  • dataa[31:0]
  • datab[31:0]
  • result[31:0]
  • clk
  • clk_en 1
  • start
  • reset
  • done
Extended Custom logic blocks that are capable of performing multiple operations
  • dataa[31:0]
  • datab[31:0]
  • result[31:0]
  • clk
  • clk_en 1
  • start
  • reset
  • done
  • n[7:0]
Internal register file Custom logic blocks that access internal register files for input or output or both.
  • dataa[31:0]
  • datab[31:0]
  • result[31:0]
  • clk
  • clk_en 1
  • start
  • reset
  • done
  • n[7:0]
  • a[4:0]
  • readra
  • b[4:0]
  • readrb
  • c[4:0]
  • writerc
External interface Custom logic blocks that interface to logic outside of the Nios II processor’s datapath Standard custom instruction ports, plus user-defined interface to external logic.
1 The clk_en input signal must be connected to the clk_en signals of all the registers in the custom instruction, in case the Nios II processor needs to stall the custom instruction during execution.