MAX® 10 FPGA Device Family Pin Connection Guidelines

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ID 683232
Date 8/20/2024
Public
Document Table of Contents
Document Table of Contents x
MAX® 10 FPGA Device Family Pin Connection Guidelines
MAX® 10 FPGA Device Family Pin Connection Guidelines x
MAX® 10 FPGA Pin Connection Guidelines Power Supply Sharing Guidelines for MAX® 10 FPGA Devices Document Revision History for the MAX® 10 FPGA Device Family Pin Connection Guidelines
MAX® 10 FPGA Pin Connection Guidelines x
Clock and PLL Pins Configuration/JTAG Pins Differential I/O Pins External Memory Interface Pins Reference Pins Analog Input Pins MAX® 10 (Single Supply) FPGA MAX® 10 (Dual Supply) FPGA Notes to the MAX® 10 FPGA Pin Connection Guidelines
Power Supply Sharing Guidelines for MAX® 10 FPGA Devices x
Example 1— MAX® 10 (Dual Supply) FPGA Example 2— MAX® 10 (Dual Supply) FPGA Example 3— MAX® 10 (Dual Supply) FPGA Example 4— MAX® 10 (Single Supply) FPGA Example 5— MAX® 10 (Single Supply) FPGA Example 6— MAX® 10 (Single Supply) FPGA
MAX® 10 FPGA Device Family Pin Connection Guidelines

Reference Pins

Note: Altera recommends that you create a Quartus® Prime design, enter your device I/O assignments, and compile the design. The Quartus® Prime software checks your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device user guides.
Table 5.  Reference Pins
Pin Name Pin Functions Pin Description Connection Guidelines
GND Ground Device ground pins.

Altera recommends you to tie REFGND to the GND pin with an isolating ferrite bead for the best ADC performance.

Connect all GND pins to the board GND plane.

NC No Connect Do not drive signals into these pins. When designing for device migration you may connect these pins to power, ground, or a signal trace depending on the pin assignment of the devices selected for migration. However, if device migration is not a concern, leave these pins floating.
DNU Do Not Use Do Not Use (DNU). Do not connect to power, GND, or any other signal. These pins must be left floating.
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