Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide

ID 683175
Date 12/03/2021
Document Table of Contents

2.3.1. Estimating Power Consumption Before Starting the FPGA Design

Table 1.  Advantage and Constraints of Power Estimation before Designing FPGA
Advantage Constraint
  • You can obtain power estimates before starting your FPGA design.
  • You can adjust design resources and parameters and see how those changes affect total power consumption.
  • Accuracy depends on your inputs and your estimate of the device resources; where this information may change (during or after your design is complete), your power estimation results may be less accurate.
  • The Early Power Estimator spreadsheet uses averages and not the actual design implementation details. The Power Analyzer has access to the full design details. For example, the EPE uses average values for ALM configuration, while the Power Analyzer specifies an exact configuration for each ALM.

To estimate power consumption with the EPE spreadsheet before starting your FPGA design, follow these steps:

  1. On the Main worksheet of the EPE spreadsheet, select the target family, device, and package from the Family, Device, Device Grade, Package, and Transceiver Grade drop-down lists.
  2. Enter values for each worksheet in the EPE spreadsheet. Different worksheets in the EPE spreadsheet display different power sections, such as clocks and phase-locked loops (PLLs).
  3. The calculator displays the total estimated power consumption in the Total (W) cell of the Main worksheet.