AN 830: Intel FPGA Triple-Speed Ethernet and On-Board PHY Chip Reference Design

ID 683167
Date 5/19/2021
Public

1.5.1. Configuration Script

The configuration script, config.tcl contains the settings and parameters that configure the Triple-Speed Ethernet MAC, Triple-Speed Ethernet PCS and Marvell PHY registers in this reference design.
  • Triple-Speed Ethernet MAC configurations can be changed by configuring the MAC registers. For more information about Triple-Speed Ethernet MAC configuration register space, refer to Triple-Speed Ethernet Intel® FPGA IP User Guide.
  • Triple-Speed Ethernet PCS configurations can be changed by configuring the PCS registers. For more information about Triple-Speed Ethernet PCS configuration register space, refer to Triple-Speed Ethernet Intel® FPGA IP User Guide.
  • Marvell PHY configurations can be changed by configuring the on-board PHY chip register.

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