AN 733: Altera JESD204B IP Core and TI ADC12J4000 Hardware Checkout Report

ID 683135
Date 2/09/2015
Public

1.4. Hardware Checkout Methodology

The following section describes the test objectives, procedure, and the passing criteria. The test covers the following areas:

  • Receiver data link layer
  • Receiver transport layer
  • Descrambling
  • Deterministic latency (Subclass 1)

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