SDI II Intel® FPGA IP User Guide

ID 683133
Date 6/28/2022
Public

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8.2.1.5. Avalon-MM Translators

The Avalon-MM Master Translator and Avalon-MM Slave Translator are Avalon-MM interface blocks that access the Transceiver Reconfiguration Controller registers. The translators are not SDI-specific and are automatically instantiated when the core interfaces with an Avalon-MM master or slave component.

If you want to bypass the Avalon MM translator in your design, connect reconfig_mgmt_address[8:2] from the reconfiguration management block to reconfig_mgmt_address from the Transceiver Reconfiguration Controller.

You can connect the other signals from the reconfiguration management block directly to the Transceiver Reconfiguration Controller.
  • reconfig_mgmt_waitrequest
  • reconfig_mgmt_read
  • reconfig_mgmt_readdata
  • reconfig_mgmt_write
  • reconfig_mgmt_writedata

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