Intel® Quartus® Prime Standard Edition User Guide: Third-party Simulation

ID 683080
Date 2/05/2024
Document Table of Contents

3.2. VCS and VCS MX Guidelines

The following guidelines apply to simulation of Intel FPGA designs in the VCS or VCS MX software:
  • Do not specify the -v option for because it defines a systemverilog package.
  • Add -verilog and +verilog2001ext+.v options to make sure all .v files are compiled as verilog 2001 files, and all other files are compiled as systemverilog files.
  • Add the -lca option for Stratix® V and later families because they include IEEE-encrypted simulation files for VCS and VCS MX.
  • Add -timescale=1ps/1ps to ensure picosecond resolution.