Intel® Quartus® Prime Standard Edition User Guide: Third-party Simulation

ID 683080
Date 2/05/2024
Document Table of Contents

1.2.3. Simulation Stage

The commands that apply to the simulation stage actually run the simulation. The input to simulation stage commands is the executable simulation model that you generate during the elaboration stage, along with other inputs, such as how long to simulate, and which signals to capture for waveform viewing and dumping.

As the Files and Directories for Executable Model of my_top_tb figure shows, the output of the simulation stage is simply the output from a simulation run, which can include messages issued by HDL modules, files written out by the simulator such as waveform dumps, and any GUI display of simulation in progress.

Figure 4. Files and Directories for Executable Model of my_top_tb