Intel® Quartus® Prime Standard Edition User Guide: Third-party Simulation

ID 683080
Date 2/05/2024
Document Table of Contents

3.3. VCS Simulation Setup Script Example

The Intel® Quartus® Prime software can generate a simulation setup script for IP cores in your design. The scripts contain shell commands that compile the required simulation models in the correct order, elaborate the top-level design, and run the simulation for 100 time units by default. You can run these scripts from a Linux command shell.

The scripts for VCS and VCS MX are (for Verilog HDL or SystemVerilog) and (combined Verilog HDL and SystemVerilog with VHDL). Read the generated .sh script to see the variables that are available for override when sourcing the script or redefining directly if you edit the script. To set up the simulation for a design, use the command-line to pass variable values to the shell script.

Using Command-line to Pass Simulation Variables


Example Top-Level Simulation Shell Script for VCS-MX

# Run generated script to compile libraries and IP simulation files
# Skip elaboration and simulation of the IP variation
sh ./ip_top_sim/synopsys/vcsmx/ SKIP_ELAB=1 SKIP_SIM=1 QSYS_SIMDIR="./ip_top_sim"
#Compile top-level testbench that instantiates IP
vlogan -sverilog ./
#Elaborate and simulate the top-level design 
vcs –lca –t ps <elaboration control options> top_testbench
simv <simulation control options>

Example Top-Level Simulation Shell Script for VCS

# Run script to compile libraries and IP simulation files
sh ./ip_top_sim/synopsys/vcs/ TOP_LEVEL_NAME=”top_testbench”\
# Pass VCS elaboration options to compile files and elaborate top-level
 passed to the script as the TOP_LEVEL_NAME
# Pass in simulation options and run the simulation for specified amount of time.
USER_DEFINED_SIM_OPTIONS=”<simulation control options>