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Ixiasoft
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 7 FPGA F-Series Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information
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Ixiasoft
4.2.2. The Sys Info Tab
The Sys Info tab shows information about the board's current configuration. The tab displays the board information, JTAG chain devices, and Qsys memory map for the bts_config.sof design and other details stored on the board.
Figure 8. The Sys Info Tab
The following sections describe the controls on the System Info tab.
Board Information
The Board Information control displays static information about your board.
- Board Name: Indicates the official name of the board given by the BTS.
- Board Revision: Indicates the revision of the board.
- Max Version: Indicates the version of the system MAX® 10.
- Power MFR: Indicates the FPGA Power manufacture.
JTAG Chain
The JTAG Chain control shows all the devices currently in the JTAG chain.
Note: The system MAX® 10 (VTAP) is always on the JTAG chain, but change the settings of SW4 to low or high to bypass or enable power MAX® 10, HPS, and Agilex™ 7 FPGA. The system MAX® 10 and FPGA should all be in the JTAG chain when configured and running the BTS GUI.
Qsys Memory Map
The Qsys Memory Map control shows the memory map of the bts_config.sof design running on your board. This can be visible when the bts_config.sof design is running on board.