Intel Agilex® 7 FPGA F-Series Development Kit User Guide

ID 683024
Date 1/18/2024
Public
Document Table of Contents
Give Feedback

A.2.1. JTAG Chain and Header

The figure below shows the JTAG Chain connections. An option to bypass the Intel Agilex® 7 FPGA during board bring up is provided but not shown in the figure.
Figure 17. JTAG chain on the Development Kit

The JTAG chain allows programming of the Intel Agilex® 7 FPGA and the Intel® MAX® 10 CPLD devices using the external Intel® FPGA Download Cable II dongle. The dongle can be used to program both the Intel Agilex® 7 FPGA and Intel® MAX® 10 CPLD via the external 2x5pin 0.1” programming header. This header uses a shrouded vertical connector and is designed to be accessible from the PCIe* bracket side. This avoids having to remove the PC case to program the device when the board is installed in a closed system.