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RF CMOS Technology Scaling in High-k/Metal Gate Era

RF CMOS technology benefits from general CMOS technology scaling and improves by innovative transistor and interconnect technologies.

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Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K

Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K, an option for the 45nm high-performance logic technology node.

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Strained Germanium QWFE Transistor as P-Channel Device Option for Low Power III-V CMOS Architecture

Demonstrates a Germanium p-channel QWFET with thin scaled TOXE and high mobility, delivering four times higher hole mobility.

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Role of High-K Gate Dielectrics

Presentation Discusses Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices.

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High-κ Gate Dielectrics, Metal Gate Electrodes in Silicon and Non-Silicon Logic Nanotechnology

Discusses low gate-leakage silicon and non-silicon transistor nanotechnology using high-κ gate dielectrics and metal gate electrodes.

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Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation

Paper: non-planar, multi-gate InGaAs QWFETs with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations of 5nm.

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Evaluation/Transport Physics: Schottky-Gate III-V Compound Semiconductor QWFE Transistors

Paper examines and evaluates logic performance of Schottky-gate QWFETs against that of advanced Strained Si MOSFETs in low power voltages.

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Intel Announces New 22nm 3D Tri-gate Transistors

Presentation: Intel introduces a fundamentally different technology for future microprocessor families, 3D transistors manufactured at 22nm.

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The Robotic Musicians: Intel’s Industrial Control in Concert

This computer-powered orchestra uses a variety of technologies such as a security camera, sensors, and touchscreens to make beautiful music.

Jasper Forest From Intel Animation

Video introduces Jasper Forest: the newest addition to the Intel® Xeon® processor family.