Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs

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ID 851249
Date 5/12/2025
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines 2. Agilex™ 3 FPGA Mechanical Construction 3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction 4. Power and Thermal Calculator (PTC) 5. Thermal Design Process 6. General FPGA Thermal Design Considerations 7. Design Examples 8. Heat Sinks 9. Document Revision History for the Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs A. Agilex™ 3 FPGA Product Keys and Package Drawings
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines x
1.1. Thermal Design Requirements 1.2. Thermal Design Flow 1.3. Definitions of Thermal and Power Terms Used in this Document
2. Agilex™ 3 FPGA Mechanical Construction x
2.1. Built-in Temperature Sensors
2.1. Built-in Temperature Sensors x
2.1.1. Agilex™ 3 FPGA Temperature Rating
3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. CTM Top Temperature, TCASE Virtual Sensor 3.4. Obtaining the CTM
4. Power and Thermal Calculator (PTC) x
4.1. PTC Thermal Tab Parameters 4.2. Thermal Analysis with the PTC 4.3. PTC Thermal Tab Calculation Options 4.4. Thermal Resistances and Low Power Devices 4.5. Sensor Temperatures on the PTC Thermal Tab
5. Thermal Design Process x
5.1. Package Heat Flow Path 5.2. Variables Affecting the Heat Flow Path 5.3. Recommended Thermal Design Method
6. General FPGA Thermal Design Considerations x
6.1. FPGA Power Considerations
6.1. FPGA Power Considerations x
6.1.1. FPGA Maximum Allowed Power Dissipation 6.1.2. Static, Dynamic, and Standby Power 6.1.3. Future-Proofing an FPGA Thermal Design
7. Design Examples x
7.1. Example 1: Find Cooling Solution for Maximum Junction Temperature Limit 7.2. Example 2: Find Available Thermal Margin for Cooling Solution 7.3. Example 3: Find the Ambient Temperature for a Specified Cooling Solution
8. Heat Sinks x
8.1. Attachment Force 8.2. Thermal Interface Material (TIM)
8.2. Thermal Interface Material (TIM) x
8.2.1. Common TIM2 Materials
8.2.1. Common TIM2 Materials x
8.2.1.1. TIM2 Performance Parameters And Challenges 8.2.1.2. Understanding Resistance and Pressure Map Curves
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines
2. Agilex™ 3 FPGA Mechanical Construction
3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction
4. Power and Thermal Calculator (PTC)
5. Thermal Design Process
6. General FPGA Thermal Design Considerations
7. Design Examples
8. Heat Sinks
9. Document Revision History for the Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs
A. Agilex™ 3 FPGA Product Keys and Package Drawings

8.2.1.2. Understanding Resistance and Pressure Map Curves

Various thermal interface materials (TIMs) have been characterized using an in-house TIM tester, and resistance versus pressure map curves have been obtained. These tests were conducted for various TIMs across different pressure ranges.

Two graphs have been plotted separately for Gap Pads and other TIM materials due to the significantly higher resistances of Gap Pads, which are one order of magnitude higher compared to other TIMs. As illustrated below, resistances are higher initially or in low-pressure regions. However, as pressure increases, resistance decreases, indicating the establishment of effective contact between two solid surfaces, such as the heat source and heat sink materials. Beyond a certain pressure threshold, the variation becomes asymptotic, with limited gains in resistance reduction.

The following figure shows the measured curves for initial Gap Pad thicknesses in the range of 0.8 to 1.2 mm reveal that performance varies based on material composition and manufacturer. These are provided as a best guide for typical lidless low-power FPGA applications. However, the appropriate Gap Pad thickness can be selected based on the gap between the package and heatsink requirements.

Figure 16. Low Power Applications: GAP PAD TIM Resistance / Pressure Map Curves

The appropriate Gap Pad thickness can be selected based on the gap between the package and heatsink requirements.

In the following figure, the measured curves reveal that metallic TIMs exhibit the lowest thermal resistance, followed by phase-change materials and grease TIMs. These are provided as a best guide for both lidded and lidless medium to high-power FPGA applications

Figure 17. High Power Applications: Gap Pads TIM Resistance / Pressure Map Curves

To estimate the impact of varying TIM2 thermal conductivity on the package TJ, a mid-power device was selected with a standard heat sink and a TIM2 of certain thickness and thermal conductivity of 4 W/mK as the baseline. Only the TIM2 conductivity was varied.

The following figure shows the change in TJ for mid-range power devices, with change in TIM2 conductivity, assuming the baseline TIM2 conductivity is 4 W/mK. It can be seen that for thermal conductivities between 2 to 6 W/mK, the impact of TIM2 materials on lidless packages thermal performance is relatively significant, of the order of 5oC. Beyond 6 W/mK, even when employing heat sink solutions with different base materials, high conductivity TIMs do not significantly enhance performance, where the package temperature impact is less than 2°C.

Figure 18. Effect of Different TIM2 Materials on Junction Temperature for Mid-power Range Agilex 3 Lidless Packages with Different Heat Sink Solutions

A similar comparison was done for low-power Agilex™ 3 devices with a TIM2 thermal conductivity of 4W/mK as the baseline. As illustrated in the figure below, for low-power applications using thicker Gap Pads, TIM2 thermal conductivity significantly enhances thermal performance, up to a TIM2 k value of about 8W/m-K. Beyond this threshold, high-performance TIM2 materials have only a marginal impact on thermal performance. For these applications typically Gap Pads are primary choice due to cost and higher gap between package and heatsink. The thickness depends on the gap between package and the heat sink, and the usual range is of the order of 0.8 to 1.2 mm

Figure 19. Effect of Different TIM2 Materials on Junction Temperature for Low-Power Range Agilex 3 Lidless Packages with Different Heat Sink Solutions

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