Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs

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ID 851249
Date 5/12/2025
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines 2. Agilex™ 3 FPGA Mechanical Construction 3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction 4. Power and Thermal Calculator (PTC) 5. Thermal Design Process 6. General FPGA Thermal Design Considerations 7. Design Examples 8. Heat Sinks 9. Document Revision History for the Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs A. Agilex™ 3 FPGA Product Keys and Package Drawings
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines x
1.1. Thermal Design Requirements 1.2. Thermal Design Flow 1.3. Definitions of Thermal and Power Terms Used in this Document
2. Agilex™ 3 FPGA Mechanical Construction x
2.1. Built-in Temperature Sensors
2.1. Built-in Temperature Sensors x
2.1.1. Agilex™ 3 FPGA Temperature Rating
3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. CTM Top Temperature, TCASE Virtual Sensor 3.4. Obtaining the CTM
4. Power and Thermal Calculator (PTC) x
4.1. PTC Thermal Tab Parameters 4.2. Thermal Analysis with the PTC 4.3. PTC Thermal Tab Calculation Options 4.4. Thermal Resistances and Low Power Devices 4.5. Sensor Temperatures on the PTC Thermal Tab
5. Thermal Design Process x
5.1. Package Heat Flow Path 5.2. Variables Affecting the Heat Flow Path 5.3. Recommended Thermal Design Method
6. General FPGA Thermal Design Considerations x
6.1. FPGA Power Considerations
6.1. FPGA Power Considerations x
6.1.1. FPGA Maximum Allowed Power Dissipation 6.1.2. Static, Dynamic, and Standby Power 6.1.3. Future-Proofing an FPGA Thermal Design
7. Design Examples x
7.1. Example 1: Find Cooling Solution for Maximum Junction Temperature Limit 7.2. Example 2: Find Available Thermal Margin for Cooling Solution 7.3. Example 3: Find the Ambient Temperature for a Specified Cooling Solution
8. Heat Sinks x
8.1. Attachment Force 8.2. Thermal Interface Material (TIM)
8.2. Thermal Interface Material (TIM) x
8.2.1. Common TIM2 Materials
8.2.1. Common TIM2 Materials x
8.2.1.1. TIM2 Performance Parameters And Challenges 8.2.1.2. Understanding Resistance and Pressure Map Curves
1. Introduction to Agilex™ 3 FPGA Thermal Design Guidelines
2. Agilex™ 3 FPGA Mechanical Construction
3. Agilex™ 3 FPGA Compact Thermal Model (CTM) Construction
4. Power and Thermal Calculator (PTC)
5. Thermal Design Process
6. General FPGA Thermal Design Considerations
7. Design Examples
8. Heat Sinks
9. Document Revision History for the Thermal Design User Guide: Agilex™ 3 FPGAs and SoCs
A. Agilex™ 3 FPGA Product Keys and Package Drawings

6.1.1. FPGA Maximum Allowed Power Dissipation

FPGAs are not generally rated for any thermal design power (TDP). The maximum power dissipation generally depends on the number of power pins and the maximum rated current for each pin.

Maximum current values are based on reliability values for operation at 100⁰ C junction temperature. At lower temperatures, it is possible to run at higher powers than the maximum, or if the lifetime of the application can be reduced. You should refer such requests to your Altera Field Application Engineer for further analysis.

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