AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers
ID
848984
Date
9/29/2025
Public
1. Overview
2. Preparing LiteRT Inference Model
3. Generating Nios® V Processor System
4. Generating Arm Processor System
5. Programming and Running
6. Nios® V Processor with TinyML Design Example
7. Appendix
8. Document Revision History for the AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers
4.2.1.1. Booting from QSPI Flash
Follow the steps below to generate the ATF bootloader files:
$ cd $TOP_FOLDER $ git clone -b socfpga_v2.11.0 https://github.com/altera-opensource/arm-trusted-firmware atf_tinyml $ cd atf_tinyml $ ARCH=arm64 CROSS_COMPILE=aarch64-none-linux-gnu- make PLAT=agilex5 SOCFPGA_BOOT_SOURCE_QSPI=1 bl2 bl31 PRELOADED_BL33_BASE=0x80100000 -j$(nproc)
You can find the generate bootloader files bl2.bin and bl31.bin in the following location: $TOP_FOLDER/atf_tinyml/build/agilex5/release/