AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers
ID
848984
Date
9/29/2025
Public
1. Overview
2. Preparing LiteRT Inference Model
3. Generating Nios® V Processor System
4. Generating Arm Processor System
5. Programming and Running
6. Nios® V Processor with TinyML Design Example
7. Appendix
8. Document Revision History for the AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers
2.4.3. Analyzing the LiteRT Model
Identify the type of op resolver needed to run the model using LiteRT for Microcontrollers libraries. Refer to Appendix for more information about op resolver registration in the main() function. For this LeNet-5 example, the op resolvers are:
- CONV_2D
- AVERAGE_POOL_2D
- FULLY_CONNECTED
- RESHAPE
- SOFTMAX
# Analyse the LiteRT Model tf.lite.experimental.Analyzer.analyze(model_path="lenet.tflite")
Figure 6. Results from Analyzer
Note: The LiteRT for Micro libraries do not support all types of op resolver from LiteRT. Ensure that you can find the op resolvers listed by the Analyzer in the following path: tensorflow/lite/micro/micro_mutable_op_resolver.h.
For more information on the LiteRT for Micro libraries, please refer to Building LiteRT for Microcontroller Static Library chapter.
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