Hard Processor System Technical Reference Manual: Agilex™ 3 SoCs

ID 848530
Date 6/23/2025
Public
Document Table of Contents

5.10.4. SPI Controller System Integration

The SPI supports data bus widths of 32 bits.

Figure 222. SPI Block Diagram

The functional groupings of the main interfaces to the SPI block are as follows:

  • System bus interface
  • DMA peripheral request interface
  • Interrupt interface
  • SPI interface