Hard Processor System Technical Reference Manual: Agilex™ 3 SoCs

ID 848530
Date 6/23/2025
Public
Document Table of Contents

4.4.5.2. Bootloader Support

By default, the U-Boot SPL and Arm* Trusted Firmware BL2 bootloaders reconfigure region 0 to also allow non-secure accesses to whole OCRAM. You need to change the source code to define a different scheme.
For U-Boot SPL, the code is in arch/arm/mach-socfpga/spl_agilex5.c and looks like this:
clrbits_le32(SOCFPGA_OCRAM_FIREWALL_ADDRESS + 0x18, BIT(0));
For Arm* Trusted Firmware BL2, the code is in plat/intel/soc/agilex5/bl2_plat_setup.c and looks like this:
mmio_write_32(OCRAM_REGION_0_REG_BASE, OCRAM_NON_SECURE_ENABLE);